Announcement 9/13    之後上課時間都從 13:20 開始，教室不變 　 Time: Monday 13:20-16:20 Instructor: Chia-Lin Yang (楊佳玲) Email: yangc@csie.ntu.edu.tw Office: CSIE R411 Office Hours: TBA 　 TA: 林仲祥 E-mail: sitos.lin[at]gmail.com Office: Embedded Computing Lab, CSIE R308 Office Hours: TBA 　 TA: 呂仁碩 E-mail: d98922016[at]csie.ntu.edu.tw  Office: Embedded Computing Lab, CSIE R308 Office Hours: TBA 　 Course Contents: This course focuses on advanced computer architecture design such as deep pipelining, techniques to exploit instruction level parallelism and thread level parallelism, and memory hierarchy management. Students will acquire the skills of evaluating the performance of alternative design choices in system design. Textbook & Reference Books: Computer Architecture: A Quantitative Approach. Fourth Edition, John L. Hennessy and David A. Patterson, Morgan, 2007 Modern Processor Design- Fundamentals of Superscalar Processors. John Paul Shen and Mikko H. Lipasti. Beta Edition. McGraw-Hill (references) Readings in Computer Architecture. Mark D. Hill, Norman P. Jouppi and Gurindar S. Sohi (references) Course Outline: Basics of Computer architecture design (Ch 1) Technology trend Power & dependability issue How to measure and summarize performance? Instruction level parallelism (Appendix A & Ch 2 &3) Review on pipelining Compiler techniques for exploiting ILP Branch prediction Dynamic instruction scheduling Speculative execution Supercalar processors Multiprocessors and thread-level parallelism (Ch 4) Shared-memory architectures Synchronization & Consistency Multi-core architecture Memory Hierarchy (Ch 5 & Appendix C) Review on memory hierarchy 11 advanced optimizations of cache performance Virtual memory and virtual machine Storage system (Ch 6) Advanced Topics Power-aware architecture Variation-aware architecture 3D architecture Grading Policy: (subject to change) 40% Exams (Midterm + Final) 30% Homework 30% Projects